1. general description the 74ahc02-q100; 74ahct02-q100 is a high -speed si-gate cmos device and is pin compatible with low-power schottky ttl (l sttl). it is specified in compliance with jedec standard no. 7-a. the 74ahc02-q100; 74ahct02-q100 provides a quad 2-input nor function. this product has been qualified to the automotive electronics council (aec) standard q100 (grade 1) and is suitable for use in automotive applications. 2. features and benefits ? automotive product qualif ication in accordance with aec-q100 (grade 1) ? specified from ? 40 ? c to +85 ? c and from ? 40 ? c to +125 ? c ? balanced propagation delays ? all inputs have a schmitt-trigger action ? inputs accept voltages higher than v cc ? input levels: ? for 74ahc02-q100: cmos level ? for 74ahct02-q100: ttl level ? esd protection: ? mil-std-883, method 3015 exceeds 2000 v ? hbm jesd22-a114f exceeds 2000 v ? mm jesd22-a115-a exceeds 200 v (c = 200 pf, r = 0 ? ) ? multiple package options 74ahc02-q100; 74ahct02-q100 quad 2-input nor gate rev. 1 ? 23 may 2013 product data sheet
74ahc_ahct02_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved . product data sheet rev. 1 ? 23 may 2013 2 of 15 nxp semiconductors 74ahc02-q100; 74ahct02-q100 quad 2-input nor gate 3. ordering information 4. functional diagram table 1. ordering information type number package temperature range name description version 74ahc02-q100 74AHC02D-Q100 ? 40 ? c to +125 ? c so14 plastic small outline package; 14 leads; body width 3.9 mm sot108-1 74ahc02pw-q100 ? 40 ? c to +125 ? c tssop14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm sot402-1 74ahc02bq-q100 ? 40 ? c to +125 ? c dhvqfn14 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 ? 3 ? 0.85 mm sot762-1 74ahct02-q100 74ahct02d-q100 ? 40 ? c to +125 ? c so14 plastic small outline package; 14 leads; body width 3.9 mm sot108-1 74ahct02pw-q100 ? 40 ? c to +125 ? c tssop14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm sot402-1 74ahct02bq-q100 ? 40 ? c to +125 ? c dhvqfn14 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 ? 3 ? 0.85 mm sot762-1 fig 1. logic symbol fig 2. iec logic symbol fig 3. logic diagram (one gate) mna216 1a 1b 1y 3 2 1 2a 2b 2y 6 5 4 3a 3b 3y 9 8 10 4a 4b 4y 12 11 13 001aah084 2 1 3 5 4 1 6 1 8 10 1 9 11 13 1 12 mna215 a b y
74ahc_ahct02_q100 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved . product data sheet rev. 1 ? 23 may 2013 3 of 15 nxp semiconductors 74ahc02-q100; 74ahct02-q100 quad 2-input nor gate 5. pinning information 5.1 pinning 5.2 pin description (1) this is not a supply pin. the substrate is attached to this pad using conductive die atta ch material. there is no electrical or mechanical requi rement to solder this pad. however, if it is soldered, the solder land should remain floating or be connected to gnd. fig 4. pin configuration so14 and tssop14 fig 5. pin configuration dhvqfn14 $ + & |